In present day computing and communications device platforms many different device components are often arranged on a printed circuit board, package or even a single semiconductor die, the latter often referred to as a system on a chip (SoC). Device components that may be present on an SoC chip include, for example, general purpose processor cores, graphics processing units, memory controller, display engine, cache, to name a few components. Other components such as power management units may be arranged on an SoC chip or in another die. A problem with efficient operation of some SoC architecture arises from managing activity across each subsystem to achieve optimally efficient performance. Anytime peripheral regions become active and generate events such as direct memory access, interrupts, or other signals, other components including processor cores, graphics processor units, may be forced to reside in a relatively high power state that consumes excess power, even though processor core functions may not be required. This may become an impairment to efficient operation under many type or workloads and in particular under semi-active workloads.
Accordingly, there may be a need for improved techniques and apparatus to solve these and other problems.